Cadence Design Systems Sees AI Agents Driving Chip Design Boom and Growth

Cadence Design Systems (NASDAQ:CDNS) said demand for semiconductor design software is being supported by a growing number of companies developing custom chips, rising design complexity and the use of artificial intelligence in semiconductor development.

Speaking at Deutsche Bank’s 20th annual technology conference, Richard Gu, Cadence’s vice president of investor relations, said the semiconductor and systems industries have increasingly converged over the past 10 to 15 years. Hyperscalers, autonomous-vehicle companies and AI model companies are among the organizations designing their own application-specific integrated circuits, he said.

“The aperture is expanded dramatically” through new customers and design starts, Gu said, while the complexity of those designs is also increasing. He characterized those factors as long-term tailwinds for Cadence, which supplies electronic design automation, intellectual property, hardware systems and simulation software.

AI agents and productivity

Gu said AI is serving as a “turbocharger” for the semiconductor ecosystem and that Cadence is both supplying tools used to develop AI accelerators and applying AI to its own products.

The company has introduced several “super agents” designed to automate portions of chip development, including ChipStack for front-end design verification, Veristack for analog design-flow orchestration, Innostack for digital flows and Aurastack for packaging. Gu said ChipStack can generate RTL code from design specifications, create test benches and invoke underlying simulation and verification tools.

According to Gu, the agents are intended to address a widening gap between customers’ engineering needs and the supply of available chip designers. He said chip-design workloads could rise by 30 to 40 times over the next five to six years, making automation increasingly important.

Gu cited comments by NVIDIA CEO Jensen Huang at Computex indicating that ChipStack had produced a 40-times productivity benefit. Cadence plans to monetize the agents through standalone pricing, additional token-based consumption once prescribed workloads are exceeded, and increased use of the company’s underlying EDA tools, he said.

He added that the agents could help smaller teams undertake more sophisticated chip-development efforts, potentially lowering barriers for newer entrants.

Broad-based growth across product lines

Gu said Cadence’s most recent second-quarter revenue grew 24%, with core EDA revenue up approximately 18% to 19%, system design and analysis revenue rising more than 35%, and IP revenue increasing more than 40%. Core EDA represents about 70% of the company’s business, he said.

For the full year, Gu said Cadence expects to grow 19% and generate a non-GAAP operating margin of 44.25%. He said the company expects its combined growth and profitability metrics to exceed the “Rule of 60,” referring to the sum of revenue growth and operating margin.

Cadence’s IP strategy is focused on advanced-node technologies rather than attempting to serve every category, Gu said. The company is targeting connectivity-related IP, including HBM, UCIe and PCIe, that is exposed to AI infrastructure demand. He said the IP business is on pace to reach a $1 billion annualized run rate by year-end.

While Gu called IP a good business, he said EDA remains more attractive because customers generally must purchase EDA capabilities rather than build them internally. He said Cadence aims to balance IP growth with margin expansion and continue targeting a 50% incremental margin for the company overall.

Backlog, China and system simulation

Cadence exited the second quarter with a record $8.1 billion backlog, Gu said. He noted that its current remaining performance obligation coverage ratio was about 58%, which he said provides visibility into revenue expected over the next 12 months.

The company’s typical EDA software contracts run for roughly 2.5 to three years and are recognized ratably, while hardware follows a shorter pattern and is typically evaluated on a six-month outlook, Gu said.

Gu said China remains a healthy and balanced market for Cadence, with growth expected to be at least in line with the company average this year. Cadence sells emulation systems, EDA tools and IP in China, he said, and works with customers including large language model developers, hyperscalers and autonomous-driving companies.

He said local Chinese competitors remain smaller, offer more point tools and lack the full design flows and foundry certifications that Cadence provides. The company does not view them as a near- or medium-term threat, he said.

In system design and analysis, Gu said Cadence is integrating the Hexagon business it acquired about two years ago and is focused on creating a full flow for physical AI and structural design. He said the integration is tracking in line with expectations.

Gu also highlighted Cadence’s Millennium platform, developed with NVIDIA, which combines GPU computing with Cadence simulation software. He said customers have reported productivity improvements of 50 to 60 times in certain applications, and the technology could have uses in aerospace, defense and automotive markets.

Long-term outlook

Gu said investors should watch recurring revenue growth as a measure of Cadence’s progress, as the company’s subscription and consumption-based AI offerings are expected to flow through that metric. He maintained that Cadence’s business is more closely tied to design starts and design complexity than semiconductor unit volumes.

Even if semiconductor customers enter a downturn, R&D budgets have historically been among their most protected spending categories, Gu said. He said Cadence’s revenue, margins, earnings per share and cash flow have shown steady growth through prior industry cycles.

“Our business is not driven by volume,” Gu said. “It’s driven by design starts and design complexities.”

About Cadence Design Systems (NASDAQ:CDNS)

Cadence Design Systems, Inc (NASDAQ: CDNS) is a global provider of electronic design automation (EDA) software, hardware and intellectual property used to design and verify advanced semiconductor chips, systems-on-chip (SoCs), printed circuit boards (PCBs) and packaging. Headquartered in San Jose, California and founded in 1988, Cadence serves semiconductor companies, original equipment manufacturers and system designers across the globe, helping customers accelerate design cycles and manage the complexity of modern integrated systems.

The company’s offerings span software tools for digital, custom/analog and mixed-signal design, verification and signoff, as well as solutions for system-level modeling, thermal and signal integrity analysis, and PCB and package design.